The present invention relates to the etching of features in, and the removal of the layer(s) of an integrated circuit and, in particular, to laser interferometer systems and techniques for monitoring such etching, including etching to a given depth or to end point and the time rate of change of thickness.
In IC (integrated circuit) technology, dry etching techniques including plasma chemical etching and plasma reactive ion etching are used to selectively fabricate the layers of the IC chip, for example, by replicating mask patterns in constituent layers such as dielectric thin films and silicon substrates. During dry etching, automatic trench depth detection is very important for process control and for the performance characteristics of the resulting IC.
FIGS. 1 and 2 depict the laser interferometer etch-monitoring techniques for thin films and trench holes. The laser beam 11 reflected from the top of a film 12 on a layer 13 such as silicon is interfered with the beam 14 reflected from the bottom of the film, when the film is transparent to the laser light (FIG. 1), or with the beam 16 reflected from the bottom of a hole or trench 17 in the layer (FIG. 2).
The thickness d of the layer and the wavelength .lambda. of the laser light are related by 2 d=N(.lambda./n), where n is the refractive index. For integral values N=1, 2, 3, etc., interference is constructive and reflected intensity is a maximum, whereas for half integral values N=1/2, 3/2, 5/2, etc., the reflected light interferes destructively and the intensity is a minimum. During etching (or deposition), the characteristic sinusoidal optical interference pattern of repetitive maxima and minima is monitored. This pattern terminates upon complete removal of the layer, signaling the etching end point. Also, the distance between adjacent maxima or minima, 1/2 (.lambda./n), is one-half the effective wavelength of the laser light in the layer and provides a convenient basis for determining the thickness of the material which has been removed from the layer (by multiplying the number of cycles by the distance or thickness of material removed per cycle) and the time rate of etching.
However, the laser light must be illuminated onto a target area of the associated layer which typically occupies a small percentage of the total circuit or die area. Also, other IC structure within the target area may scatter the laser light. As a consequence of such factors, it may be difficult to detect the small target area of interest and the reflected laser beam may have an undesirably low signal-to-noise ratio. Commonly assigned U.S. Pat. No. 4,618,262, filed Apr. 13, 1984, issued Oct. 21, 1986, to Maydan et al, which is incorporated here by reference in its entirety, addresses the above problems, in part, by monitoring relatively structure-free topographical features such as scribe lines and focusing the laser beam to a small area relative to the target feature.
Also, the laser beam is repetitively scanned across the scribe line while monitoring the resulting interference pattern. Alternatively, the beam is scanned across the line for detection and locked onto the detected line for monitoring the resulting interference pattern. The incorporated '262 patent also refers to the possible use of laser beams to generate diffraction interference patterns from an appropriate repetitive array of IC features such as repetitively-spaced lines.